P87C51RD2

The P87C51RD2 devices support 6-clock/12-clock mode selection by programming an OTP bit (OX2) using parallel programming. In addition, an SFR bit (X2) in the clock control register (CKCON) also selects between 6-clock/12-clock mode. The devices also have four 8-bit I/O ports, three 16-bit timer/event
counters, a multi-source, four-priority-level, nested interrupt structure, an enhanced UART and on-chip oscillator and timing circuits.

Features of P87C51RD2:-

• 80C51 Central Processing Unit
– 8 kbytes OTP (87C51RA2)
– 16 kbytes OTP (87C51RB2)
– 32 kbytes OTP (87C51RC2)
– 64 kbytes OTP (87C51RD2)
– 512 byte RAM (87C51RA2/RB2/RC2)
– 1 kbyte RAM (87C51RD2)
– Boolean processor
– Fully static operation
– Low voltage (2.7 V to 5.5 V at 16 MHz) operation
• Two speed ranges at VCC = 5 V
– 0 to 30 MHz with 6-clock operation
– 0 to 33 MHz with 12-clock operation
• 4 interrupt priority levels
• Four 8-bit I/O ports
• Full-duplex enhanced UART
– Framing error detection
– Automatic address recognition

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