The ATmega16A Atmel AVR core combines a rich instruction set with 32 general purpose working registers. All th32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be
accessed in one single instruction executed in one clock cycle. The resulting architecture is more code efficient
while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega16A provides the following features: 16Kbytes of In-System Programmable Flash Program
memory with Read-While-Write capabilities; 512bytes EEPROM; 1Kbyte SRAM; 32 general purpose I/O lines,
32 general purpose working registers; a JTAG interface for Boundary-scan; On-chip Debugging support and
programming; three flexible Timer/Counters with compare modes; Internal and External Interrupts; a serial
programmable USART; a byte oriented Two-wire Serial Interface, an 8-channel; 10-bit ADC with optional
differential input stage with programmable gain (TQFP package only); a programmable Watchdog Timer with
Internal Oscillator; an SPI serial port; and six software selectable power saving modes. The Idle mode stops the
CPU while allowing the USART; Two-wire interface; A/D Converter; SRAM; Timer/Counters; SPI port; and
interrupt system to continue functioning. The Power-down mode saves the register contents but freezes the
Oscillator, disabling all other chip functions until the next External Interrupt or Hardware Reset. In Power-save
mode, the Asynchronous Timer continues to run, allowing the user to maintain a timer base while the rest of the
device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except Asynchronous
Timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the crystal/resonator
Oscillator is running while the rest.
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